This invention relates to a frequency acquisition system and, more specifically, a frequency acquisition system that uses a phase-locked loop and/or a frequency-locked loop.
Prior art clock and data recovery (CDR) circuits may include a tunable oscillator, such as a voltage controlled oscillator (VCO), which is controlled both by a fine tune control signal produced by a phase-locked loop and a coarse tune control signal produced by a frequency-locked loop. Typically, the coarse tune control signal will set the center frequency of the VCO and the fine tune control signal will make smaller adjustments to drive the output signal towards the frequency of a reference or data signal.
The phase-locked loop (PLL) may fail to lock if the center frequency of the voltage controlled oscillator (VCO) is more than a few thousand parts-per-million (PPM) from the symbol rate of the incoming data. When the CDR is included on an IC and produced in mass quantity, a minimum variation of 10% can be expected in a VCO center frequency over process, temperature and supply. This wide range of frequencies may make it impossible for the PLL to lock under all situations without some type of frequency acquisition aid.
One technique known in the art for getting the frequency from the VCO to be in the range where the PLL can acquire lock is to frequency lock the VCO to a reference signal. At startup of the CDR, or when a loss of lock has been detected, the frequency-locked loop pulls the VCO to within a few hundred parts-per-million (PPM) of the reference frequency. A lock detector within the frequency-locked loop determines when frequency lock has been established and relinquishes control of the receiver timing to the phase-locked loop. The lock detector also determines when the frequency-locked loop leaves its locked state by comparing the frequency of the VCO to the frequency of the reference clock.
With one prior art frequency-locked loop, an analog charge pump is used to establish the correct voltage on the coarse tune port. There are two major drawbacks in using an analog charge pump: a charge pump typically requires a capacitor that may be on the order of xcexcF so it must be an off-chip component, and the capacitor is subject to leakage from numerous sources (e.g., ESD diodes, internal leakage of the capacitor).
When the lock detector disables the frequency-locked loop, the charge on the charge pump capacitor, which initially holds a charge representative of the present state of the coarse frequency tune signal, will change due to such effects as leakage current and circuit noise if no external compensation for lost charge is provided. An additional complication is that even if the charge on the charge pump capacitor does not change, the VCO output frequency can drift due to factors such as temperature or power supply variation.
An off-chip capacitor used with a CDR preferably has low leakage, otherwise the voltage from the fine tune signal can develop a large dc offset, which may alter the dynamics of the phase-locked loop. A large-valued capacitor with low leakage is physically big, and thus impacts the size of the printed circuit board on which it resides. A further complication in using a large off-chip component is that off chip connections may be subject to noise sources on the printed circuit board, which is disadvantageous because the coarse tune port of the VCO should be subject to as little noise as possible to minimize jitter generation.
Moreover, with the prior art CDR""s, it may be necessary to use a transconductance amplifier to compensate for changes of charge on the frequency-locked loop charge pump capacitor due to the effects of leakage current and circuit noise such that the phase-locked loop can adequately compensate for variations in the center frequency due to these effects.
It is therefore an object of this invention to provide an improved frequency acquisition system for a coarse and fine tunable oscillator.
It is a further object of this invention to provide such an improved frequency acquisition system that avoids the use of an off-chip capacitor to store the present state of a coarse control signal for the fine tunable oscillator.
It is a further object of this invention to provide such an improved frequency acquisition system that does not require leakage compensation for a capacitor in the frequency-locked loop.
It is a further object of this invention to provide such an improved frequency acquisition system that does not require the use of a transconductance amplifier to compensate for a capacitor leakage in a frequency-locked loop.
It is a further object of this invention to provide such an improved frequency acquisition system in which the time constant for the frequency-locked loop is accurately determinable.
The invention results from the realization that a more effective frequency acquisition system that reduces jitter generation by avoiding the use of a large frequency-locked loop capacitor can be obtained by using a digital accumulator circuit to digitally store and update the value of the present control state of a tunable oscillator to adjust the frequency of the tunable oscillator towards the frequency of a reference signal.
This invention features phase-locked loop system for a coarse and fine tunable oscillator comprising a phase detector responsive to the phase of an output signal of a tunable oscillator and the phase of a reference signal to provide an output signal representative of a difference in phase between the output signal and the reference signal; a loop filter, responsive to the output signal representative of the difference in phase, for providing a fine control signal to a fine control of the tunable oscillator to drive the frequency of the output signal of the tunable oscillator toward the frequency of the reference; and an accumulator circuit for digitally storing the present state of a coarse control signal of the tunable oscillator and responsive to the fine control signal for digitally updating the state of the coarse control of the tunable oscillator to drive the frequency of the output signal of the tunable oscillator towards the frequency of the reference signal.
In a preferred embodiment, the tunable oscillator may be a voltage controlled oscillator. The accumulator circuit may include an adder circuit having a first input coupled to an output of a register circuit, a second input responsive to the fine control signal, and an output coupled to an input of the register circuit. The accumulator circuit may include an analog to digital converter. The analog to digital converter may include a sigma-delta-modulator circuit. The register circuit may include a bit register. The loop filter may include a charge pump responsive to the output signal representative of a difference in phase, for providing an input to the accumulator circuit. The phase-locked loop system may include a frequency-locked loop that includes a frequency detector system responsive to the frequency of the output signal of the tunable oscillator and a frequency of a second reference signal to provide the coarse control signal. The frequency-locked loop may include a quantizer responsive to the coarse control signal, a digital to analog circuit having an input coupled to an output of the quantizer, and a low pass filter having an input coupled to the output of the digital to analog circuit and an output coupled to the tunable oscillator.
The invention also features a frequency acquisition system comprising a frequency detector system, responsive to the frequency of an output signal of a tunable oscillator and the frequency of a reference signal, to provide a digital output signal representative of a difference in frequency between the output signal and the reference signal; and an accumulator circuit responsive to a value representative of the present control state of the tunable oscillator and to the digital output signal for providing an updated value for adjusting the frequency of the tunable oscillator towards the frequency of the reference signal, the accumulator circuit including a digital register circuit for storing the value representative of the present control state of the tunable oscillator.
In a preferred embodiment of the frequency acquisition system, the accumulator circuit may include an adder circuit responsive to the digital output signal and the value stored in the register circuit. The frequency acquisition system may include a drift compensation loop circuit including a phase detector responsive to the phase of the output signal of the tunable oscillator and the phase of a second reference signal to provide a second output signal representative of a difference in phase between the output signal and the reference signal; and a loop filter, responsive to the second output signal representative of the difference in phase, for providing a fine control signal to a fine control of the tunable oscillator to drive the frequency of the output signal of the tunable oscillator toward the frequency of the reference signal. The loop filter may include a charge pump responsive to the output signal representative of the difference in phase, the charge pump providing an input to the accumulator circuit. The tunable oscillator may include a voltage controlled oscillator. The accumulator circuit may include an analog to digital converter. The analog to digital converter may include a sigma-delta-modulator circuit. The frequency acquisition system may include a quantizer responsive to the coarse control signal, a digital to analog circuit having an input coupled to an output of the quantizer, and a low pass filter having an input coupled to the output of the digital to analog circuit and an output coupled to the tunable oscillator.
The invention also features a frequency acquisition system for a tunable oscillator including a frequency-locked loop circuit including a detector system, responsive to the frequency of an output signal of a tunable oscillator and the frequency of a first reference signal, to provide a digital output signal representative of a difference in frequency between the output signal and the first reference signal; a drift compensation loop circuit including a phase detector responsive to the phase of the output signal of the tunable oscillator and the phase of a second reference signal to provide a second output signal representative of a difference in phase between the output signal and the second reference signal; a loop filter, responsive to the second output signal representative of the difference in phase, for providing a fine control signal to a fine control of the tunable oscillator to drive the frequency of the output signal of the tunable oscillator toward the frequency of the second reference signal; and an accumulator circuit for digitally storing the present state of either the fine control signal or the digital output and for providing a coarse control signal to a coarse control of the tunable oscillator to update the tunable oscillator to drive the frequency of the output signal of the tunable oscillator towards the frequency of the second reference signal.
Preferably, in this embodiment of the frequency acquisition system, the accumulator circuit may include an adder circuit responsive to the value stored in the register circuit and either the digital output signal or the second output signal. The tunable oscillator may include a voltage controlled oscillator. The accumulator circuit may include an analog to digital converter. The analog to digital converter may include a sigma-delta-modulator circuit. The first reference signal may include a clock signal and the second reference signal may include a data signal.